Resumen de Limit laws for a family of random circuits

José Antonio Moler Cuiral , Fernando Plo , Miguel San Miguel Marco , Henar Urmeneta Martín-Calero

• We consider a family of graphs C(n; i; s; a) that represents logic circuits with indegree i and restricted outdegree s, arising by n progressive additions of random gates to a starting circuit of a isolated nodes. We prove that its growing behaviour can be modelled via a generalized P¶olya urn model. The asymptotic properties of the processes associated to the urn are used to obtain a strong law and a central limit theorem for the number of terminal nodes in the graph. A similar procedure is used to obtain a strong law and a central limit theorem for outputs in random recursive circuits with unrestricted outdegree.